The overall array architecture for a typical virtual ground array based flash memory device includes a virtual ground array accessed by a set of row decoders/multiplexors and a set of column decoders/multiplexors. The virtual ground array contains information stored in individual memory elements. The row decoders/multiplexors are used to access specific memory elements within each memory block and the column decoder/multiplexor provides the input and output circuitry for each memory element.
The architecture of a virtual ground array comprises both individual memory elements and select gates. The memory elements are embodied in non-volatile transistors that may be programmed to a logic state of 0, 1, or other states depending on the particular type of transistor and programming used. The select gates are embodied in normal MOSFETs. Selectable word lines address both the control gates of the transistors that comprise the individual memory elements and select gates in the virtual ground array. Sets of memory elements are connected in series along each word line. The select gates are connected in pairs that are coupled to alternate select gate address lines. The pairs of select gates are connected with pairs of memory elements and a global bitline. A set of multiplexors control the columns that are connected to the external circuitry, such as the sensing circuitry and data-in path. The multiplexors are controlled by a set of column address decoders. Thus, the decoders and multiplexors regulate the flow of data into and out of the virtual ground array.
Variations of the threshold voltage of the individual memory elements within the virtual memory array occur as a result of variations in the manufacture, continual operation over time and as a result of operating conditions of the memory device. Because of these variations in the threshold voltage, it is necessary to characterize the distribution and placement of the threshold voltages for both reasons of functionality and reliability.
A safe and accurate sensing scheme uses sensing from the source side of the virtual ground array. Sensing is accomplished from the source side as using the drain side of the virtual ground array has a number of disadvantages. The main disadvantage of drain side sensing is that all the other bitlines connected with memory elements not being sensed must be precharged to the drain voltage or higher before the sensing routine commences. Precharging the bitlines, in this case, uses both time and power. Time is necessary to initiate, perform, and verify the precharging sequence when sensing from the drain side. Excess power is consumed in each of the precharge steps as well, for example decreasing battery lifetime for any portable electronics unit using the virtual ground array. In addition, sensing from the drain side leads to larger leakage currents and more thus error. Thus, it is necessary to characterize the threshold distribution of memory elements using the source side to determine the optimal operating conditions.